Delay Models
How tools estimate cell delay and slew under real loads.
Overview
Timing engines use pre-characterized models to estimate cell delay and output slew. These models are essential for fast, accurate static timing analysis across large designs.
The accuracy of delay modeling depends on input slew, output load, and interconnect effects.
Key Models
NLDM uses lookup tables indexed by input slew and output capacitance. It is fast and widely supported.
CCS models output current waveforms and captures non-linear effects better at advanced nodes.
Interconnect delay adds RC effects and can dominate total path delay in deep submicron designs.
Practical Guidance
Use CCS where available for better accuracy on aggressive nodes.
Keep slew within library limits to avoid pessimistic or invalid timing.
Use real extracted parasitics during late-stage signoff.